Electronic Design

PCI Express Leads the Way in IoT Connectivity

The role the high-bandwidth, low-latency PCI Express (PCIe) interconnect in the IoT space. How PCIe architecture is used in IoT segments such as edge computing, test equipment, embedded/industrial PCs ...
Business Wire

Teledyne LeCroy Announces Industry’s First Protocol Exerciser/Analyzer for PCI Express ® 5.0

MILPITAS, Cailf.--(BUSINESS WIRE)--Teledyne LeCroy, Inc., the worldwide leader in protocol test solutions and business unit of Teledyne Technologies Incorporated (NYSE:TDY), today announced the ...
Electronic Design

11 Myths About PCI Express

PCI Express (PCIe) architecture is the ubiquitous Load/Store IO technology. Nonetheless, a host of myths and misunderstandings hold numerous engineers back from applying PCIe technology as broadly and ...
Ars Technica

PCIe 5.0 is just beginning to come to new PCs, but version 6.0 is already here

The PCI Special Interest Group (PCI-SIG) has finalized version 6.0 of the PCI Express standard, the communication bus that lets all the stuff inside your computer communicate. The new version of the ...
ExtremeTech

Leak: Intel's Rocket Lake To Deliver New 14nm CPU Architecture, PCIe 4.0

Intel's Rocket Lake could deliver the largest uplift in chipset capabilities that we've seen in quite some time -- as well as a new CPU architecture despite the fact that RLK is still a 14nm part.
EDN

PCI Express System Interconnect Software Architecture

A multi-peer system using a standard-based PCI Express multi-port as the System Interconnect was described in an IDT white paper by Kwok Kong. That white paper described the different address domains ...
EDN

MEMS clock generators for PCIe applications

PCI Express (PCIe) has become the most popular interface for chip-chip and board-board communications in PC and embedded applications. PCIe is a point-point, multi-lane, serial-bus architecture that ...
Nasdaq

Cadence Achieves PCIe 5.0 Specification Compliance for PHY and Controller IP in TSMC Advanced Technologies

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that its PHY and Controller IP for the PCI Express® (PCIe®) 5.0 specification in the TSMC N7, N6 and N5 ...
ExtremeTech

The PCIe 5.0 Specification is Now Available, Before PCIe 4.0 Has Even Shipped

The PCI-SIG has announced the completion of the PCIe 5.0 specification. In the history of PCI development, this may be the first time a new standard has been finished before the previous iteration had ...
Memeburn

Samsung's First PCIe 6.0 SSD Could Load AI Models in Just 1.4s

Samsung's PM1763 PCIe 6.0 SSD hits mass production with 28,400 MB/s reads for AI servers. Here's why this enterprise drive ...
Semiconductor Engineering

PCIe In High-Performance FPGAs

In today’s world, when the entire computing industry is talking about high-performance and high-speed applications using FPGAs, what are the factors that can assure such performance and speed? The ...